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Known Design Marginality/Exceptions to Functional Specifications

Advisory Flash ECC: When Program/Data Cache is Enabled, ECC Errors are Captured Only

on a Single 64-Bit Slice and Not on the Full 128-Bit Flash Bank Data Width

Revision(s) Affected 0

Details When the prefetch/cache is enabled using the RD_INTF_CTRL register, ECC is verified

only on the 64-bit slice that is requested by the CPU; the other 64-bit slice of the 128-bit

Flash bank data width is not verified for ECC errors, and instead, is just loaded into the

cache. This is applicable for both Cortex™-M3 and C28x Flash memory modules.

Workaround(s) None

Advisory Flash ECC: C28x 'Flash Uncorrectable' Error Generated When Executing F021

Flash API Functions With Flash ECC Enabled

Revision(s) Affected 0

Details On the Control Subsystem, when Flash ECC is enabled (C28 ECC_ENABLE[ENABLE] =

0xA), execution of any F021 Flash API functions will generate a "Flash Uncorrectable"

error and an NMI. Flash ECC is enabled by default.

Workaround(s) Disable C28x Flash ECC before calling F021 Flash API functions by setting

C28 ECC_ENABLE[ENABLE] equal to any value other than 0xA. Then, re-enable C28x

Flash ECC by setting C28 ECC_ENABLE[ENABLE] equal to 0xA, if desired, after F021

Flash API functions have finished executing.

This will be fixed in the next revision of the silicon.

SPRZ357B– August 2011– Revised January 2012 F28M35x Concerto MCU Silicon Errata

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MAP electronics Cocerto-B Especificaciones Pagina 15