MAP electronics Cocerto-B Especificaciones descargar pdf (Pagina 22)

Usage Notes and Known Design Exceptions to Functional Specifications

www.ti.com

Advisory eQEP: eQEP Inputs in GPIO Asynchronous Mode

Revision(s) Affected 0, A, B

Details If any of the eQEP input pins are configured for GPIO asynchronous input mode via the

GPxQSELn registers, the eQEP module may not operate properly. For example,

QPOSCNT may not reset or latch properly, and pulses on the input pins may be missed.

This is because the eQEP peripheral assumes the presence of external synchronization

to SYSCLKOUT on inputs to the module.

For proper operation of the eQEP module, input GPIO pins should be configured via the

GPxQSELn registers for synchronous input mode (with or without qualification). This is

the default state of the GPxQSEL registers at reset. All existing eQEP peripheral

examples supplied by TI also configure the GPIO inputs for synchronous input mode.

The asynchronous mode should not be used for eQEP module input pins.

Workaround(s) Configure GPIO inputs configured as eQEP pins for non-asynchronous mode (any

GPxQSELn register option except “11b = Asynchronous”).

Advisory eQEP: Missed First Index Event

Revision(s) Affected 0

Details If the first index event edge at the QEPI input occurs at any time from one system clock

cycle before the corresponding QEPA/QEPB edge to two system clock cycles after the

corresponding QEPA/QEP edge, then the eQEP module may miss this index event. This

can result in the following behavior:

• QPOSCNT will not be reset on the first index event if QEPCTL[PCRM] = 00b or 10b

(position the counter reset on an index event or position the counter reset on the first

index event).

• The first index event marker flag (QEPSTS[FIMF]) will not be set.

Workaround(s) Reliable operation is achieved by delaying the index signal such that the QEPI event

edge occurs at least two system clock cycles after the corresponding QEPA/QEPB

signal edge. For cases where the encoder may impart a negative delay (t

) to the QEPI

signal with respect to the corresponding QEPA/QEPB signal (that is, QEPI edge occurs

before the corresponding QEPA/QEPB edge), the QEPI signal should be delayed by an

amount greater than "t

+ 2*SYSCLKOUT".

This is fixed in Revision A silicon.

F28M35x Concerto™ MCU Silicon Errata SPRZ357J–August 2011–Revised July 2014

Submit Documentation Feedback

1 2 ... 17 18 19 20 21 22 23 24 25 26 27 ... 38 39

Sin comentarios

MAP electronics Cocerto-B Especificaciones Pagina 22