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Revision History

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6 Revision History

This revision history highlights the technical changes made to the SPRZ357I errata document to make it

an SPRZ357J revision.

Scope: See the following table.

LOCATION ADDITIONS, DELETIONS, AND MODIFICATIONS

Section 4.1.5 Updated "Major Device Revision Usage Note"

Section 4.2 Known Design Exceptions to Functional Specifications:

• "Crystal: Maximum Equivalent Series Resistance (ESR) Values are Reduced" advisory:

– Removed "This issue will be fixed in the next silicon revision" from Workaround(s)

• "Cortex-M3 Flash: C28x Reset While C28x Holding Pump Ownership Can Cause Erroneous Cortex-M3

Flash Reads" advisory:

– Updated Details

– Removed "This issue will be fixed in the next silicon revision" from Workaround(s)

• Added "RAM Controller: Cortex-M3 Correctable Error Address Register Always has Value 0x0" advisory

• "RAM Controller: C28x Correctable Error Address Register Always has Value 0x0" advisory:

– Changed "Revision(s) Affected" from "0, A, B" to "0"

• "GPIO: GPIO38 and GPIO46 Shunt to V

Due to Fast Transient Sensitivity at High Temperature"

advisory:

– Removed "This issue will be fixed in a future revision of the silicon" from Workaround(s)

• Added "Control Subsystem I

C: FIFO Interrupt Trigger Levels Capped at 7" advisory

F28M35x Concerto™ MCU Silicon Errata SPRZ357J–August 2011–Revised July 2014

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