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Usage Notes and Known Design Exceptions to Functional Specifications

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Advisory FPU: FPU Register Write Followed by F32TOUI32, FRACF32, UI16TOF32, or

F32TOUI32

Revision(s) Affected 0

Details This advisory applies when the execution phase of an FPU register write coincides with

the F32TOUI32, FRACF32, UI16TOF32, and F32TOUI32 instructions.

If the F32TOUI32 instruction and FPU register write operation occur in the same cycle,

the target register (of the write operation) gets written with the output of the F32TOUI32

instruction instead of the data present on the C28x data write bus. This scenario also

applies to the following instructions:

• F32TOUI32 RaH, RbH

• FRACF32 RaH , RbH

• UI16TOF32 RaH , mem16

• UI16TOF32 RaH , RbH

• F32TOUI32 RaH , RbH

Workaround(s) An FPU register write must be followed by a gap of five NOPs or non-conflicting

instructions before F32TOUI32, FRACF32, UI16TOF32, or F32TOUI32 can be used.

Example of Problem:

SUBF32 R5H, R3H, R1H || MOV32 *--XAR4, R4H

EISQRTF32 R4H, R2H

UI16TOF32 R2H, R3H

MOV32 R0H, @XAR0 ; Write to R0H register

NOP ;

F32TOUI32 R1H, R1H ; R1H gets written to R0H

I16TOF32 R6H, R3H

Example of Workaround:

SUBF32 R5H, R3H, R1H || MOV32 *--XAR4, R4H

EISQRTF32 R4H, R2H

UI16TOF32 R2H, R3H

MOV32 R0H, @XAR0 ; Write to R0H register

NOP

F32TOUI32 R1H, R1H

I16TOF32 R6H, R3H

This is fixed in Revision A silicon.

F28M35x Concerto™ MCU Silicon Errata SPRZ357J–August 2011–Revised July 2014

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MAP electronics Cocerto-B Especificaciones Pagina 26